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SolarEdge is constantly seeking energetic, talented individuals who are looking for challenging opportunities in this continuously growing industry. We invite you to build your career with us at SolarEdge.

Analog Layout Engineer

Job Description

SolarEdge is a global leader in smart energy technology which provides cutting-edge solutions for the way power is harvested and managed in solar photovoltaic (PV) systems. SolarEdge's solutions require ASIC controllers which are both highly flexible and low power, combining digital logic with analog circuits design. 

Imagine what you can do here at SolarEdge? Together we can help craft the next generation of the world’s finest electronics systems in renewable energy. As a member of our Analog design group you'll be responsible for all the company's innovative products in the field of renewable energies. We are searching for dedicated Analog Layout Engineer to be responsible for high-end layout design using variety of technologies with emphasize on accuracy and precision throughout multi-dimensional optimization. 


What will you be doing?

  • Execute tasks covering all IC's layout flow.
  • Examine new technologies and PDK's.
  • Conceptual floor-plans.
  • High precision and sensitive analog block level.
  • Full chip and complicated top level layouts including running full Takeout flow.
  • Interface with professional engineers to deliver pioneering analog circuits.


Requirements

  • At least 3 years of experience in analog VLSI layout.
  • Covering all analog layout aspects including sensitive analog blocks layout techniques: from block level to full chip top level. 
  • Using Calibre and Cadence flow and layout extraction flow.
  • Multi-tasking ability and covering several projects simultaneously.
  • Layout experience in High voltage PDK's such as BCD process.  

It would be great advantage if you are: 

  • Familiar with IOs and ESD layouts.
  • Familiar with layout verification tools (Calibre, PVS). 
  • Experienced in scripting languages (Perl, Python) and CAD background. 
  • Experience with Post silicon measurements at lab.